Open research questions in Parallel Computing and Optimization Techniques
207 gap statements mined from Parallel Computing and Optimization Techniques papers in our 7.9M-paper local library, which holds 1,849 papers on the topic — drawn mostly from each paper's own stated research gap, future-work, challenge and limitation notes, and its abstract. The ones listed below are a selection still marked open; each names the study that raised it, with a DOI link where the paper has one.
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What the literature leaves open
Existing methods for solving ODEs have limitations in terms of efficiency and scalability. The Parareal method has a higher computational complexity compared to the proposed method. There is a need for improved parallel-in-time solvers for nonlinear ODEs.
However, the design space of these formats spanned by shared scale, weight, and activation format combinations has not been systematically explored, and the joint accuracy-silicon tradeoff across this space remains uncharacterized, leaving the true Pareto-optimal configurations for NPU-based edge LLM deployment an open question.
MX-Like Tensor Core for LLM Inference with NPU Integration via Hardware-Software Co-Design Exploration · 2026Finally, we identify persistent open challenges: memory bandwidth constraints, irregular matrix structures, and short unbalanced rows, underscoring the need for further optimization and architectural improvements.
Although prior sparse-kernel acceleration has largely centered on GPUs, CPUs remain a first-order inference platform in CPU-only deployments and in heterogeneous serving when GPUs are scarce or memory-constrained.
Instrumented binaries run much slower than production builds and have memory efficiency issues. Selective instrumentation and adaptive profiling are needed to balance insight quality and system performance. Privacy concerns are raised when profiling production traffic at scale.
Closed-Loop Binary Optimization: Integrating De-Identified Production Telemetry into the Build Lifecycle · 2026 · DOIThere is a gap between compiling source code to machine code and executing instructions on the processor. Static compilation cannot predict dynamic control flow and cache behavior.
Closed-Loop Binary Optimization: Integrating De-Identified Production Telemetry into the Build Lifecycle · 2026 · DOIExisting Rust-based data libraries focus primarily on either API breadth or specialized domains. There is a gap for a library that simultaneously provides a comprehensive SIMD-optimized operation stack, first-class bindings for both Python and WebAssembly, custom memory management, and modular feature composition.
Veloxx: An Ultra-High Performance Data Processing Library with SIMD-Accelerated Columnar Operations · 2026 · DOICompilation time overhead from Rust monomorphization with full SIMD feature flags is mentioned but not quantified; a systematic analysis comparing incremental vs. full compilation times across feature subsets (CSV-only, CSV + filtering, full feature set) should be conducted to characterize the compile-time vs. runtime performance trade-off in Veloxx's feature flag system.
Veloxx: An Ultra-High Performance Data Processing Library with SIMD-Accelerated Columnar Operations · 2026 · DOITraditional optimizations for CPUs and GPUs are not easily applicable to modern DSPs. There is a need for efficient GEMM libraries that can maximize computational capabilities and bandwidth utilization of multi-core DSPs.
Existing analysis approaches have significant limitations. There is a need for a memory-centric analysis framework that can provide detailed insights into system behavior.
An integrated framework for memory-centric analysis: from trace collection to co-design · 2026 · DOIFuture work will explore the integration of SVE2 (Scalable Vector Extensions) for wider logic gates, the expansion of the bit-sliced model to complex join operations and multi-dimensional spatial queries, and the application of this primitive to emerging domains such as real-time feature extraction for large-scale ML pipelines.
AarchGate: A Domain-General Bit-Sliced JIT Execution Primitive for ARM64 - Technical Architecture and Implementation · 2026 · DOIFuture research will focus on scaling these optimizations to thousand-GPU clusters by integrating with hybrid parallelism strategies and generalizing cost-fitting models for emerging architectures like State Space Models (SSMs).
AdaptiveLoad: Towards Efficient Video Diffusion Transformer Training · 2026Building on KVDrive, our future research will focus on three key directions. First, we aim to extend our holistic management to multimodal models, which present distinct KV cache access patterns compared to text-only LLMs. Second, we plan to investigate Processing-in-Memory hardware to offload selection and partial computation directly into storage tiers, further mitigating data movement bottlenecks.
KVDrive: A Holistic Multi-Tier KV Cache Management System for Long-Context LLM Inference · 2026The evaluation of the statistical quality of PRNGs is challenging due to the complexity of the tests. The selection of the best PRNG for a specific application is difficult due to the lack of guidance. The development of new PRNGs with improved statistical quality is a challenging task.
ASSESSING THE STOCHASTIC PROPERTIES OF MODERN PSEUDO-RANDOM GENERATORS FOR PARALLEL COMPUTING · 2026The study only evaluates a limited number of generators. The tests are conducted under consistent conditions, but may not reflect real-world usage. The study does not provide a comprehensive comparison of all available generators.
ASSESSING THE STOCHASTIC PROPERTIES OF MODERN PSEUDO-RANDOM GENERATORS FOR PARALLEL COMPUTING · 2026For compressed sparse data representations, index-matching is critical in these kernels due to time-consuming memory accesses.
SIMA: Scalable Scratchpad-Based Index-Matching Hardware Accelerator for Sparse Linear Algebra · 2026 · DOILimited registers within a DSP core. Instruction-level parallelism (ILP) optimization.
INT2 KV-cache quantization is a challenging problem for long-context LLM serving. Simple rotations such as Hadamard transforms are not aligned with downstream attention.
OSCAR: Offline Spectral Covariance-Aware Rotation for 2-bit KV Cache Quantization · 20263DGS rendering remains too expensive for many latency-sensitive scenarios. Exploiting Tensor Cores for 3DGS is non-trivial because rasterization does not naturally match their execution model.
Accelerating 3D Gaussian Splatting using Tensor Cores · 2026End-to-end integration remains challenging for current models. Hardware resource utilization remains low, indicating there is substantial room for improved design strategies and optimization. The evaluation was conducted using simulation only.
HSCO-Bench: An Agent-Driven End-to-End Hardware-Software Co-design Benchmark for Systems-on-Chip · 2026Little work addresses multi-model scheduling under GPU memory constraints.
Towards Multi-Model LLM Schedulers: Empirical Insights into Offloading and Preemption · 2026To bridge this gap, we conduct a joint hardware-software (HW-SW) co-design exploration of the above underexplored MX-like design space with three innovations.
MX-Like Tensor Core for LLM Inference with NPU Integration via Hardware-Software Co-Design Exploration · 2026The computational cost of exact GP inference. The heavy dependency footprint of existing Python libraries like GPyTorch.
Lightweight Gaussian Process Inference in C++ on Metal and CUDA · 2026Extending the compiler with a continuation passing style translation to lift PopPy's restrictions. Improving the execution time overhead of PopPy for certain programs.
PopPy: Opportunistically Exploiting Parallelism in Python Compound AI Applications · 2026Exploring performance-resource trade-offs under varying resource constraints. Investigating the impact of different accelerator templates on SoC generation.
HSCO-Bench: An Agent-Driven End-to-End Hardware-Software Co-design Benchmark for Systems-on-Chip · 2026
Most-cited papers in Parallel Computing and Optimization Techniques
- Scalable molecular dynamics on CPU and GPU architectures with NAMD · The Journal of Chemical Physics · 2020 · 3,276 citations
- A bridging model for parallel computation · Communications of the ACM · 1990 · 2,561 citations
- Q uantum ESPRESSO toward the exascale · The Journal of Chemical Physics · 2020 · 2,086 citations
- Scalar Timing in Memory · Annals of the New York Academy of Sciences · 1984 · 1,096 citations
- Heterogeneous parallelization and acceleration of molecular dynamics simulations in GROMACS · The Journal of Chemical Physics · 2020 · 988 citations
- Micropipelines · Communications of the ACM · 1989 · 982 citations
- Data parallel algorithms · Communications of the ACM · 1986 · 615 citations
- SPEC CPU2000: measuring CPU performance in the New Millennium · Computer · 2000 · 577 citations
- PyTorch 2: Faster Machine Learning Through Dynamic Python Bytecode Transformation and Graph Compilation · 2024 · 564 citations
- The Problem with Threads · Computer · 2006 · 542 citations
Most recent work
- A Referee Report on AI_Bleeding: Semantic Exhaustion via Out-of-Distribution Linguistic Payload — The Paper's Own Compute Metric Refutes Its Attack-Vector Claim (EA-REFEREE-AIBLEEDING-01 v1.1) · Zenodo (CERN European Organization for Nuclear Research) · 2026
- HIP-DFPT: Scalable Optimization of Irregular Workloads in Quantum Perturbation on GPU Clusters · IEEE Transactions on Parallel and Distributed Systems · 2026
- RAMS: Runtime Adaptive Memory Scaling for Tiny Deep Learning on IoT Devices · IEEE Transactions on Mobile Computing · 2026
- CXL in Cloud Practice: Practical Lessons for Incrementally Scaling Deployment · IEEE Transactions on Computers · 2026
- Accuracy-Aware Mixed-Precision GPU Auto-Tuning · IEEE Transactions on Parallel and Distributed Systems · 2026
- Towards the efficient use of RISC-V architecture in scientific computation · Journal of Computational Science · 2026
- Trilinos: Enabling Scientific Computing across Diverse Hardware Architectures at Scale · ACM Transactions on Mathematical Software · 2026
- SIMT-Step Execution: A Flexible Operational Semantics for GPU Subgroup Behavior · Proceedings of the ACM on Programming Languages · 2026
- Kuiper: Correct and Efficient GPU Programming with Dependent Types and Separation Logic · Proceedings of the ACM on Programming Languages · 2026
- An Arbitrary Register Grouping Scheme for RISC-V Vector Extension: Compilation Support and Hardware Implementation · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2026
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